1. Field of the Invention
The present invention relates to a method of selectively forming nonsilicided and silicided semiconductor structures on the same substrate, and, more particularly, to a method of masking silicide deposition utilizing a spacer oxide layer to prevent exposure to silicide-forming metals, thereby restricting silicide formation to unmasked surfaces.
2. Description of the Related Art
With the increased density of semiconductor devices, sheet resistivity of electrically-conducting structures of these devices, such as the gate, drain and source regions of MOS transistors, the emitters of bipolar transistors, the local interconnect regions of MOS and bipolar transistors, and the interconnect lines connecting these devices together, is beginning to limit the speed at which semiconductor devices can operate.
One well-known technique for reducing the sheet resistivity of silicon structures is to form a layer of metal silicide over the surface of silicon. The resulting silicided structures provide the lower resistivity of a metal silicide, along with the well-known attributes of silicon.
While silicides are extremely useful for enhancing the function of digital circuits, formation of silicides can interfere with the operation of analog circuits. Introduction of metal silicides into analog circuits can degrade signal integrity and aggravate circuit stress, VT offset, drift, and junction leakage.
Moreover, because silicided regions have such low sheet resistances, they are not useful to form resistors having smaller surface areas. This limitation is particularly problematic in analog circuits, where resistors are essential circuit elements.
Because of the above described fabrication limitations, it is desirable to selectively protect analog circuit structures from exposure to silicide-forming metals, where both digital and analog circuits are fabricated on the same substrate.